Proposal for a register transfer level evolution on a microprocessor incorporated flash memory
Yuji Sato · 2001
A new idea for evolvable hardware based on a microprocessor is proposed. In recent years, there has been much research using Programmable Logic Devices (PLD) and Field Programmable Gate Arrays (FPGA). In particular, the application of digital circuit evolution to engineering fields has already begun. On the other hand, long learning time, difficulty to predict when an effective capability will appear, large chip size and other such problems have hindered progress in diffusion into engineering fields. Here, we propose register transfer level evolution performed on a microprocessor as a means of addressing these problems.