A Circuit Complexity Optimization ILP Algorithm of High-level Synthesis System for New Multiprocessor Design
준회원, 세명대학교 컴퓨터학부, Jeong-Uk Chang, Lin Chi-Ho · 한국인터넷방송통신학회 논문지 · 2016
In this paper, we have proposed a circuit complexity optimization ILP algorithm of high-level synthesis system for new multiprocessor design. We have analyzed to the operator characteristics and structure of datapath in the most important high-level synthesis. We also introduced the concept of virtual operator for the scheduling of multi-cycle operations. Thus, we demonstrated the complexity to implement a multi-cycle operation of the operator, regardless of the type of operation that can be applied for commonly use in the ILP algorithm. We have achieved is that standard benchmark model for the scheduling of the 5th digital wave filter, it was exactly the same due to the existing datapath scheduling results.