Reversible Programmable Logic Arrays
Sajib Kumar Mitra, Md. Riazur Rahman · International Conference on VLSI Design · 2016
An novel approach to design Reversible PLAs maximizing the usability of garbage outputs and reducing the number of ancilla inputs is presented. A brief overview of proposed fundamental components and the architecture of reversible grid network for designing AND plane are then presented. Several algorithms have been used to describe the programming interfaces in context of Reversible PLAs construction. Finally, recent result on the trade-off between cost factors of standard benchmark circuits is reviewed.