Low complexity turbo-like codes
K.M. Chugg, J. Melzer · 2006
Error-control coding is a key feature of most modern communications systems, allowing close to a factor of ten in increased receiver sensitivity. Here we explore two aspects of low-cost error-control code decoders. First we design single decoders that provide competitive performance-complexity trade-offs over a wide range of operation. We introduce a new class of codes, show design rules and design techniques for this class, and design new codes in this class able to give, from a single decoder, extremely good performance over a range of decoding effort, block sizes, and code rates. Furthermore, these designs exhibit close to no performance penalty when generating rate-compatible codewords. The flexibility and competitive performance-complexity profile of these decoder designs allows them to be good choices both for systems that support a range of operating conditions and those that operate under fixed conditions. Next we explore decoders with hardware errors. We show that error-control code decoders that have faults in memory may exhibit very little performance degradation and suggest design techniques that virtually eliminate the performance loss from a single error.