Finite State Machine Synthesis
Martyn D. Edwards · 1992
The fundamental principles for the design of synchronous, finite state machines were outlined in chapter 2. In essence, the design task consists of implementing the state memory of a finite state machine with a set of flip-flops or latches, and determining the corresponding combinatorial logic functions which specify the next-state and outputs of the machine. Techniques are presented in this chapter which attempt to generate these combinatorial logic functions — using a range of state assignment methods — so that they may be readily optimised using the approaches described in chapters 4 and 5.