ARM® Floating Point Unit (FPU)
2015
One of the most important differences between the Cortex ® -M4 MCU and Cortex ® -M3 MCU is that an optional Floating Point Unit (FPU) is added into the Cortex ® -M4 Core to enhance the floating-point data operations. The Cortex ®- M4 FPU implements the ARMv7E-M architecture with FPv4-SP extensions. It provides floating-point computation functionality that is compliant with the ANSI/IEEE Standard 754-2008, IEEE Standard for Binary Floating-Point Arithmetic. This chapter discusses the FPU element with a completed and detailed analysis for this unit. It describes three types of the floating point data formats, half-precision, single-precision, and double precision. The Cortex ® -M4 FPU fully supports single-precision floating-point data operations, which include the addition, subtraction, multiplication, division, multiplication and accumulation (MAA), and square root operations. For complete implementation of the IEEE 754-2008 standard, floating-point functionality must be cooperated with library run-time functions.