BIST signature analysis : analytical techniques for computing the probability of aliasing
A. Ivanov · eScholarship@McGill (McGill) · 1988
Testing VLSI circuits is a complex task that requires enormous amounts of resources. To decrease testing costs, testing issues are considered earlier in the design process. This is known as "design for testability" (DFT). Built-in Self Test (BIST) is one proposed DFT approach. BIST generally consists of incorporating additional circuitry on the chip to generate test patterns and compact the response of the circuit under test (CUT) into a reference signature. Compaction implies an information loss, introducing the possibility that a faulty circuit declares itself as good. Such errors are known as aliasing errors. Several BIST schemes have been proposed, and each have a particular performance in regard to aliasing. However, the schemes are often evaluated and compared with ill-defined measures for which the underlying assumptions are either not stated or understood clearly. Here, a novel classification for the measures of aliasing is proposed. By providing clear definitions of different possible measures, the proposed classification augments the understanding of the aliasing problem. This dissertation focuses on the popular BIST scheme that consists of applying pseudorandom test patterns to a CUT and compacting the latter's response by a signature analysis register (LFSR). Assessing the quality of such a scheme in regard to fault coverage is crucial. Fault coverage can be established by full fault simulation. However, high costs may preclude this approach. Other techniques, probabilistic in nature, have been proposed, but a lack of computationally feasible techniques for analyzing the aliasing problem under a reasonable model has left them elusive. Here, new and computationally feasible techniques are developed. More specifically, closed-form expressions for the probability of aliasing are derived for a certain type of LFSRs. Upper bounds are derived for LFSRs characterized by primitive polynomials. An iterative technique is developed for computing the exact probability of aliasing for LFSRs characterized by any feedback polynomial, and for any test sequence length. These new techniques enable better assessments of the quality of BIST schemes that use signature analysis for response compaction. In turn, they are useful for making important design decisions, e.g., determining the number of test patterns that should be applied to a CUT to achieve a certain test confidence; alternatively, deciding how long the signature analyzer should be, and what type of feedback it should possess to achieve a certain desired test confidence. The techniques developed for computing the probability of aliasing in BIST are also useful in the context of coding theory. The iterative technique developed for computing the probability of aliasing may be used as an efficient technique for computing the probability of an undetected error for shortened versions of cyclic codes.