SH-X3 xible SuperH multi-core for high-performance and low-power embedded systems
Shinichi Shibahara, Masashi Takada, Tatsuya Kamei, Kiyoshi Hayase, Yutaka Yoshida, Osamu Nishii, Toshihiro Hattori · 2007
This article consists of a collection of slides from the author's conference presentation on Rensas' SH-X3, a flexible superH multi-core system for high performance and low power embedded systems. Some of the specific topics discussed include: the special features, system specifications, and system design for SH-X3 line; requirements for embedded systems; system architectures; applications for use; platforms supported; processing capabilities; memory capabilities; and targeted markets.