A modulized algorithm for computing 4
Haijun Li, Peirong Ji, Xuejun Zhou · China-Ireland International Conference on Information and Communications Technologies (CIICT 2008) · 2008
This paper presents a modulized algorithm for computing 4M-point DFT, where M is a positive integer. In the flow graph of the modulized algorithm, the 2P-point DFT blocks replace the common butterfly computation networks in flow-graph of radix-4 FFT algorithms,where 2 P 6. That is, the 4M-point DFT may be computed by the use of one 2P-point DFT block. The block diagram and program structure of the modulized algorithm are simple. The total number of computational requirements of the modulized algorithm is not bigger than those of radix-4 FFT. Specially, when using a DSP processor integrated a 2P-point DFT block to compute 4M-point DFT, the speed of DFT will be faster than that of radix-4 FFT algorithm. Similarly, the modulized algorithm may be refer to reference guide of design of the hardware block for computing 4M-point DFT. The modulized algorithm will be helpful to improve the DSP technology and speed.