Research accelerator for multiple processors
David A. Patterson, Arvind Arvind, Krste Asanović, Derek Chiou, James C. Hoe, Christos Kozyrakis, Shih‐Lien Lu, Mark Oskin, Jan Rabaey, John Wawrzynek · 2006
This article consists of a collection of slides from the author's conference presentation on RAMP, or research acclerators for multiple processors. Some of the specific topics discussed include: system specifications and architecture; uniprocessor performance capabilities; RAMP hardware and description language features; RAMP applications development; storage capabilities; and future areas of technological development.