The Conjoined Microprocessor
Ehsan Aerabi, A. Elhadi Amirouche, Houda Ferradi, Rémi Géraud, David Naccache, Jean E. Vuillemin · 2016
Over the last twenty years, the research community has devised sophisticated methods for retrieving secret information from side-channel emanations, and for resisting such attacks. This paper introduces a new CPU architecture called the Conjoined Microprocessor (CμP). The CμP can randomly interleave the execution of two programs at very low extra hardware cost. We developed for the CμP a preprocessor tool that turns a target algorithm into two (or more) separate queues like Q0 and Q1 that can run in alternation. Q0 and Q1 fulfill the same operation as the original target algorithm. Power-analysis resistance is achieved by randomly alternating the execution of Q0 and Q1, with different runs resulting in different interleavings. Experiments reveal that this architecture is indeed effective against CPA.