Architectural Support for Parallel Debugging
Anselmo Lastra, C F Starmer · 1989
This paper presents a hardware solution to some of the problems that have been plaguing parallel debugging. Due to the non-determinism exhibited by programs executing on MIMD parallel machines, cyclic debugging, as is practiced on serial machines, does not work properly. Software solutions have been implemented to mimic cyclic debugging, but they exhibit problems and limitations. Efforts that rely solely on software are necessarily affected by the {\em probe effect,} perturbations in the execution sequence caused by the debugging code. Architectural enhancements are proposed for MIMD shared memory machines. They include a scheme for the non-invasive logging of the traffic from the interconnection network to processors. This log allows repetition of the original execution sequence for bug detection, the mode of debugging to which programmers are accustomed. Key ideas presented are the use of extra processors for logging, and the use of local, process specific, clocks for time tagging the logged data as opposed to the use of a global clock. A scheme such as this allows traditional debugging on a parallel machine without the problems inherent in software-only solutions.