Built-In Self-Test Configurations for Atmel FPGAs Using Macro Generation Language
Charles E. Stroud, Jonathan Harris, S. Garimella, John Sunwoo · 2004
ABSTRACT: The development and automatic generation of Built-In Self-Test (BIST) configurations for Atmel AT40K series Field Programmable Gate Arrays (FPGAs) are described. These BIST configurations completely test the programmable logic and routing resources in the core of the FPGA along with the dedicated Random Access Memories (RAMs) dispersed within the array. The BIST configurations are generated using Atmel’s Macro Generation Language (MGL) for any size FPGA. The advantages and limitations of this approach are discussed. 1 1.