Implementation of the Inter-Core Communication and Atomic Instructions in a Heterogeneous Multi-Core Emulator
Ryo Aoki, Shuichi Oikawa · 2009
We are currently developing heterogeneous multi-core emulator, named Gryphin, that emulates the x86 and ARM processors based on QEMU. Gryphin aims at discovery of bottlenecks in heterogeneous multi-core and proposal of new speed-up techniques. This paper describes the implementation of interprocessor communication and atomic instructions on Gryphin. A ring buffer is used on dedicated shared memory for connection between emulated processors, and atomic instructions are correctly emulated by executing them on the host OS.