Fault-Tolerant Application-Specific Network-on-Chip
Fathollah Karimi Koupaei, Ahmad Khademzadeh, Majid Janidarmian · 2011
The fast scaling in technology has caused the components of a Network-on-Chip (NoC) to be more susceptible to faults; therefore, there is a need for methods to maintain circuit reliability. A fault-tolerant NoC should be able to detect a fault and recover the system to correctly operate the mapped application. In this paper, a fault-tolerant NoC architecture designed in VHDL and synthesized using Xilinx ISE is presented which not only is able to recover from single permanent router failure, but also improves the average response time of the system. In this design, a new component, called Link Interface (LI) is also developed to reduce hardware overhead.