Can DFT be Correct by Construction
Robert C. Aitken · International Test Conference · 2001
The IC design process converts ideas into products. When the ideas have progressed into register-transfer level (RTL) instructions, IC implementation can begin. RTL is synthesized into logic gates, these are placed and routed, and masks are generated from the resulting artwork. This implementation phase is where design-for-testability (DFT) circuitry is typically added. In an ideal world, DFT insertion would occur at a single point in the flow and would work flawlessly. The search for an ideal world has been in progress for some time and shows no sign of stopping soon [1] [2].