Power and clock gating modelling in coarse grained reconfigurable systems
Tiziana Fanni, Carlo Sau, Paolo Meloni, Luigi Raffo, Francesca Palumbo · 2016
Power reduction is one of the biggest challenges in modern systems and tends to become a severe issue dealing with complex scenarios. To provide high-performance and flexibility, designers often opt for coarse-grained reconfigurable (CGR) systems. Nevertheless, these systems require specific attention to the power problem, since large set of resources may be underutilized while computing a certain task.