Software vs. Hardware Message Passing Implementations for FPGA Clusters
Eoin Creedon, Michael Manzke · Advances in parallel computing · 2010
A parallel algorithm mapped onto multiple Field Programmable Gate Arrays (FPGAs) and CPUs needs to communicate and synchronise data between the FPGAs' digital logic micro-architectures and the CPU(s). A reconfigurable logic API for the FPGA and the CPU can assist the system programmer with mapping the parallel algorithm across the available resources. This work investigates alternative ways of implementing the reconfigurable logic API.