Design of reversible circuits with high testability
Hari Mohan Gaur, Ashutosh Kumar Singh · Electronics Letters · 2016
A new method of designing reversible logic circuits which can be adopted by any synthesis technique to produce parity preserving reversible circuits based on Multiple Controlled Tofolli gates is proposed. The designed circuit using proposed methodology is easily testable by checking the input and output parity. A set of benchmark circuits and corresponding testable designs are implemented. The results under testable designs show an average reduction of 32% in operating cost as compared to prior work.