Case Study on DiaHDL: A Web-based Electronic Design Automation Tool for Education Purpose.
Muhammad Shoaib Iqbal Ansari, Thomas Schumann · INC · 2010
Today Field Programmable Gate Arrays (FPGAs) are replacing Application Specific Integrated Circuits (ASICs) in many application areas, so the development of electronic circuits on FPGAs is an important topic for the education in electronic engineering. Many university labs offer FPGA-boards for the students to finally implement their developed circuits. But the development of those circuits requires the knowledge of a Hardware Description Language (HDL) such as Verilog or VHDL. We have developed the web-based tool DiaHDL [CS10], which not only generates the VHDL code out of component diagram of the circuit but also its test bench. In this paper we present a case study on this tool. We show that the generated VHDL code of a 32-bit adder circuit is functional and synthesizable.