LUT Optimization In Implementation Of Combinational Karatsuba Ofman On Virtex-6 FPGA
Deepak Kapoor, Rahul Yamasani, Saket Saurav, Abhishek Bajpai · 2016
This paper discusses different approaches that allow optimizing the combinational logic used in Multipliers for Generic ECC (Elliptic Curve Cryptography) implementation in the Galois field GF(2n) . First,a Combinational Multiplier using Karatsuba Ofman logic with 2*2as a base multiplier has been studied. Proper utilization of Look Up Table (LUT) at base level results in effective optimization of the hardware resources.