A Highly Parallel FPGA-based Evolvable Hardware Architecture
Fabio Cancare, Marco Castagna, Matteo Renesto, Donatella Sciuto · Advances in parallel computing · 2010
This work describes a new Evolvable Hardware (EHW) system, based on Xilinx Virtex-4 FPGAs, able to exploit two-dimensional dynamic reconfigurability and direct bitstream manipulation. The focus of this paper is on the performance of this new system. It will be shown how the system components have been designed in order to exploit parallelism and to mask the reconfiguration time. The system is compared to similar solutions in order to show its advantages.