A High Speed Pairing Coprocessor Using RNS and Lazy Reduction.
Gavin Xiaoxu Yao, Junfeng Fan, Ray C. C. Cheung, Ingrid M.R. Verbauwhede · 2011
In this paper, we present a high speed pairing coprocessor using Residue Number System (RNS) and lazy reduction. We show that combining RNS, which are naturally suitable for parallel architectures, and lazy reduction, which performs one reduction for more than one multiplication, the computational complexity of pairings can be largely reduced. The design is prototyped on a Xilinx Virtex-6 FPGA, which utilizes 7023 slices and 32 DSPs, and finishes one 254-bit optimal ate pairing computation in 0.664 ms.