Measurement of SRAM power-up state for PUF applications using an addressable SRAM cell array test structure
Kiyoshi Takeuchi, T. Mizutani, Takuya Saraya, Masaharu Kobayashi, Toshiro Hiramoto, Hirofumi Shinohara · 2016
SRAM data just after power-up were measured using an addressable SRAM cell array test structure. It was found that the results are strongly affected by the address switching noise and “memory effect”. An addressing sequence combined with word line reset pulse application is proposed for reliable power-up data stability evaluation.