Implementing Fair Queuing Algorithms in High Speed Routers Based on Statistical Shift Registering Sorting Architecture
Da Wang · Chinese Journal of Computers · 2001
High speed and multimedia are two trends of the future network. While today's computer networks support only best effort service, future packet switching integrated service networks will have to support real time communication services that allow clients to transport information with performance guarantees expressed in terms of delay, delay jitter, throughput, and loss rate. To provide reliable end to end quality of service guarantees to the network users, it is necessary to introduce per flow queuing scheduling algorithms to networks nodes. The Generalized Processor Sharing (GPS) discipline is proven to have desirable properties which is the basis for supporting both the guaranteed service traffic and the best effort service traffic. Among all the packet approximation algorithms of GPS, WFQ, also known as Packet Generalized Processor Sharing (PGPS), has been considered to be the best one in terms of accuracy. WF 2Q+ is an improved algorithm of WFQ, which has the most excellent performance and can be easily implemented at the same time. But the complexity of WF 2Q+ implementing structure and sorting operations make it very difficult to be implemented in a high speed environment. By observing the traffic on the Internet, we can easily find the statistical characteristics of the Internet traffic. In this paper, we provide a high speed hardware implementation of WF 2Q+ algorithm based on statistical shift registering sorting architectures. By making full use of the statistic information of each queue, high speed and complete sorting operations in sense of statistics can be implemented with less hardware resource. We also implemented our designs on the Field Programmable Gate Array (FPGA) chips by using VHDL hardware description language. According to the implementation results of FPGA, this architecture is fully capable of OC 48 (2.4Gbps) operation in high speed IP routers. Our simulation results also proved that the scheduling effect of the algorithm we implemented is almost the same as the standard WF 2Q+ algorithm.