Design and Implementation of FPGA of IF Digital Module in SDR
Shi Yong-hao · Computer Technology and Development · 2012
In order to facilitate the implementation of processing baseband signal in software radio system,IF signal needed to be processed by digital down-conversion.Referencing the standard of GSM system,digital down-conversion system based on FPGA system,which is compatible with existing communication patterns,is structured in this paper.Numerically controlled oscillator,in digital down-conversion system,uses CORDIC(Coordinate-rotation Digital Compute) to calculate the sine and cosine sample value real time,it replaces the traditional lookup tables structure,which need to consume large amounts of ROM resource,with pipeline organization which is easy to implement.Meanwhile,decimation filter is come true to achieve decimation filter module,by equivalent transformation of multiphase structure,and its structure is cascading of the integrator comb(CIC) filter,CIC,half band(HB) filters and FIR filter.IF digitization system module is designed in Verilog language,and the results of Quartus II and MATLAB simulation verified the correctness of the design and the real-time of the system.