A Reduced Design of Low Power Multivalued Double-edge-triggered Flip-flop
Yan‐Feng Lang · Journal of Hangzhou Dianzi University · 2010
This paper introduces a concept of redundant module in digital circuits and its removal is important to lower power dissipation.Further,this method is applied in a reduced design of low power multivalued double-edge-triggered flip-flop based on ternary clock.The reduced flip-flop is more simply than the original one.Both of them were simulated in HSPICE.The simulation result showed that the reduced flip-flop performs the same correct logic function as the original one and also can lower power dissipation efficiently.