The Hardware Design Research and Implementation of Big Prime Number Generation in RSA Algorithm
Ji Yao · Science Technology and Engineering · 2013
As known that it’s very important to generate the big prime number during hardware design of RSA Encryption algorithms.In order to improve the efficiency of the RSA Encryption algorithm,a deterministic algorithm for hardware implementation of big prime number automatic generation is put forward,which is based on conventional screening methods.The state machine framework is adopted for hardware implementation of the algorithm with Verilog-HDL description language.The functional verification is done with Modelsim Simulation and the results show that it can generate a prime number sequence automatically,quickly and accurately.It provides big convenience for RSA algorithm application with this prime library.