Optimization Design of Frequency Dividers Based on VerilogHDL
Weifeng Zhang · Journal of Henan University · 2007
This paper presents the algorithm,structure and Verilog implementation of integer and decimal frequency dividers,including types of even integer,odd integer with duty cycle 50% and not exactly 50%,N-0.5 and random decimal.Based on the FPGA device of ALTERA,they are simulated with LDV5.1,and synthsized with Synplify Pro.