Implementation of (2,1,7) Convolutional Coder/Decoder in FPGA
Huan Yang · 2011
Convolutional coding is an important type of FEC channel coding,and its error-correction ability is usually superior to the group coding.(2,1,7) convolutional coding is implemented in modern satellite communications systems.Viterbi algorithm could achieve the best decoding performance of convolutional coding.This paper describes the design of(2,1,7) convolutional coding module and decoding module with verilog HDL.The decoder is all-parallel architecture,and fairly high in decoding speed.The paper also explains the principle for designing various modules of the coder/decoder,and in Modelsim,gives the simulation test result of various modules.The error-correction test of the decoder is done,and the test result indicates that the viterbi decoder has fairly good error-correction ability.