FIR Filter Design of a High-speed and High-order Based on FPGA
LI Wen-gang · 2005
Based on FPGA LUT structure, it is presented a modified Distributed Arithmetic(DA) to implement high-speed and high-order FIR filter in time domain, so that it can be satisfied with processing high speed and wide band pulse compression radar signal. This method is verified by using Xilinx Vertex II FPGA.