Design and implementation of floating-point divider for GPU
Liu Tianjiang · 2013
To make up the floating-point divider resource-intensive and small application scope in the GPU,a high-speed floating-point divider design scheme of low power consumption is given in this paper.This scheme modifies high order complex structure of the divider by using the SRT algorithm,reduces the time delay by combining with on-the-fly transformation method,the SD notation and constant comparison method,and realizes single precision divider by using the verilog HDL language.The multiple case dividers are tested on the verification platform based on FPGA.The test results show that the performance of floating-point divider meets the requirements of the project,and its precision can reach one over one million.