Realization of High Accuracy Synchronous Clock for Power System Based on GPS
Peng An · Power System Technology · 2011
In view of the complementarities between the random error of one pulse per second(1PPS) in global positioning system(GPS) and accumulated error of high-precision crystal oscillator,based on the principle of digital phase-locked loop(DPLL) it is proposed to control frequency dividing coefficient of the crystal oscillator second clock by measuring the phase difference between 1PPS of GPS and the crystal oscillator second clock to eliminate the accumulated error of crystal oscillator in real-time mode,thus high-precision 1PPS can be attained and a high accuracy second clock system is designed by use of complex programmable logic device(CPLD).When the reception of GPS is in normal state,a high accuracy second clock can be come into being by CPLD according to the principle of DPLL;when the reception of GPS is in abnormal state,the stored frequency dividing coefficient can be called by CPU to control CPLD to generate high-precision clock signal.Both simulation analysis and experimental results show that the proposed clock system possesses high time accuracy and stability.