A super-high throughput implementation of MD5 algorithm on FPGA
Yuan Yan · Information technology newsletter · 2011
In this paper,a novel architecture is proposed to increase the performance of MD5 computing in FPGA,which can achieve a super-high throughput.The scheme is based on full-pipeline for MD5 implementation.Moreover,FIFO cache structure is used for data storage and cooperative computing.The results of simulation and implementation show that the scheme can achieve the theoretical upper bound on throughput.And based on the same platform of FPGA,it outperforms the published scheme with best performance in terms of 77% higher throughput.