Architecture Supported Synchronization-Based Cache Coherence Protocol for Many-Core Processors
He Huang · Chinese Journal of Computers · 2009
The efficient support of cache coherence is extremely important to design and implement many-core processors.This paper proposes a synchronization-based coherence protocol to efficiently support cache coherence for shared memory of many-core processors.The unique feature of the scheme is that it doesn't use directory at all.Inspired by scope consistency memory model,the protocol maintains coherence at synchronization point.Within critical section,process cores record write sets(which lines have been written in critical sections)with bloom-filter functions.When the core releases the lock,the write set is transferred to a synchronization manager.When another core acquires the same lock,it gets the write set from the synchronization manager and invalidates stale data in its local cache.The scheme is evaluated using programs from SPLASH-2 benchmark.The results show that synchronization-based protocol can achieve similar performance in cost-effective way compared to a directory-based protocol that requires large amount of hardware resources and huge design verification effort.