Design of Bus Analyzer for System on chip
Yuzhuo Fu · Microelectronics & Computer · 2004
In this paper we present a new method to enhance the observability of System on Chip. We succeed this by adding a new analyzing module on system bus. Our bus analyzing module is comprised of a Sampling Unit, a Memory Unit, a Debug ging Unit and a Host Interface Unit. With the help of our host software user can conveniently set sampling points, select sampling signals and query sampling re sults. The memory unit can save many sampling results.