Design and Implementation of Single-precision Floating Point Multiplier Based on Verilog
Hongdong Zhao · Journal of Sichuan University of Science & Engineering · 2009
The paper introduced the principle of the floating point numbers and the floating point multiplier,then designs 32-bit single-precision floating point multiplier based on Verilog.The software of Modelsim 6.5 is used for conversion of data format between floating point numbers and real numbers.The software of Altera QuartusⅡ7.2 is used for performing full compilation and the waveform vector timing simulation of the multiplier with EP2S15F484C3 device.In the end,the paper calculated the calculation error rate of the multiplier,compared with the expectations(true value) after the simulation result was converted to real numbers,in order to verify the correctness and feasibility of the design.