Design and Performance Optimization of Crossbar in Multi-processor Chipset
Peng Hu · Jisuanji gongcheng · 2008
Crossbar is the core logic of switch and chipset. This paper designs and implements a crossbar in multi-processor chipset, and the frequency of the crossbar is up to 100 MHz after placing and routing on FPGA platform. The delay and bandwidth of the crossbar is tested based on implementation, and some optimization strategies of the crossbar are proposed. The crossbar runs in multi-processor system composed by Godson 2E CPU.