Fast page programming algorithm for NOR flash memory
Zhu Jun · Journal of Circuits and Systems · 2008
In order to reduce the program time of NOR flash memory, a novel fast page programming algorithm, which generates different timing sequence for the program data with different 1’s, is proposed in this paper. It involves a detector circuit to examine the 1’s in the program data, and then the state machine takes these outputs of the detector circuit to generate the proper timing sequence with shortest program time. The statistics result shows that the whole page program time is less than 70% compared to that of the traditional method.