Poly-phase implementation of interpolation FIR digital filters
Jian Song · Video Engineering · 2009
A novel implementation scheme of interpolation FIR digital filter based on the poly-phase structure is proposed.The scheme utilizes the characteristics of self-symmetric and mirror symmetric of the sub-filters and shares the weighted summation units to achieve the significant reduction of logic resources and low complexity in the implementation.An FPGA implementation example of a 384-order SRRC filter with 4 times interpolation is presented to demonstrate the advantages of the proposed method.