Design and realization of controllable abnormity table for ARM by FPGA
Xiang Liu · Jisuanji gongcheng yu sheji · 2011
To improve the efficiency of abnormity management and the response speed of abnormity in ARM processor,a controllable abnormity table(CAT) for ARM based on the traditional interrupt vector table(IVT) for ARM and its realization are proposed.The CAT is efficiency by integrating the arbitration controller and the processing branches for abnormality into the traditional interrupt vector table.Firstly,tree structure with three levels in depth is introduced,which is used for describing CAT and every processing branch above.Then the controllability of CAT can be realized by changing the function of the branches.Secondly,entity definitions,description for ports and the algorithm for realization of CAT are proposed.Finally,the function simulation and debugging of the CAT are done on the FPGA board.And the results show the accuracy,reliability and controllability of the CAT.