FPGA hardware implementation scheme for AQM algorithm
Yajun Wang · Journal of Jilin University · 2013
The Field Programmable Gate Array(FPGA) hardware implementation scheme for Active Queue Management(AQM) algorithms was proposed in order to increase the execution speed and real-time of the algorithms,and to decrease the consumption of router resource.The serial communication programs between FPGA and the software-router IPCop were written.The scheme was applied to Random Early Detection(RED) algorithm.Test results show that the general communication interface between FPGA and the router was achieved,and the function of effective and rapid congestion control of RED algorithm was realized in the hardware level.This research provides an effective scheme for FPGA hardware implementation of the AQM algorithms.