Design of a Reconfigurable Memory in Platform FPGA
Iu Z · Microcomputer Information · 2008
The reconfigurable RAM block is a very important component of FPGA. To meet users’ many different application demands, the RAM block must provide good reconfigurable ability. A 16- Kb reconfigurable SRAM with high speed and low power assumption has been designed in this paper. Each block RAM supports multiple configurations or aspect ratios. It can be configured to six memory organizations, 16kx1, 8kx2, 4kx4, 2kx8, 1kx16, and 512x32. Using various configuration options, the RAM block creates dual port RAM, single port RAM, ROM, FIFOs, large look-up tables, data width converters and shifter registers. This paper introduces the complete design-method of this reconfigurable SRAM. A new memory cell circuit architecture: tri-port memory cell, and the circuit architecture to complete various reconfigurable functions are mainly introduced.