Realization of Digital Down Conversion in FPGA Chip by Using MATLAB
Jinghong Li · Jisuanji fangzhen · 2005
Digital down conversion plays a key role in the digitized and software-oriented process of the receiver system. This paper studies the high decimation ratio of digital down converter,and especially analyzes the multi-stage decimation algorithm based on CIC filter and HB filter. It will reduce the cost and the development time by using the newest Systemgenerator which can simulate the design and download it to FPGA easily. And verifying the design with an ISA bus of computer will save lots of money, effectively. Using MATLAB design and simulation hardware projects based on FPGA is a good method.