A Wide-Band Chirp-DDS and Its Implementation on FPGA
Jin Hui Xue · 2003
A wideband ChirpDDS is designed and implemented on Altera's Flex10K FPGA This device includes a pipeline 32bit frequencyphase accumulator and ROM lookup table It has achieved a system clock of 100 MHz,a frequency switching time of 068 μs,a tuning latency of 08 μs,a frequency resolution of 002328 Hz,and an output frequency range from DC to 40 MHz