FAOG: An algorithm based on filter techniques and AOG for multiple error rectification in combinational logic circuits
GE Hai-tong · Journal of Circuits and Systems · 2005
This paper presents a new algorithm for multiple error rectification in combinational logic circuits. The algorithm is based on the use of filter techniques and AOG graphs. Filter techniques are used to eliminate impossible error locations so as to reduce the circuits size needed for dealing. AOG graphs, which are AND/OR graphs corresponding to circuits, are key parts of rectification. The algorithm is completely automated for tree structured circuits and semi-automated for general circuits. Unlike simulation-based approaches, not only can this algorithm pin-point the exact error locations, but may also suggest a way to fix the design. And it also alleviates the memory explosion problem greatly. The experiment indicates that it is a fast and efficient way to diagnosis and correct errors, and a befitting algorithm for combinational circuits of multiple errors.