The Research and Implementation of Dynamic Partial Reconfigurable System Based on EAPR
Guojun Dai · Journal of Hangzhou Dianzi University · 2011
In this paper,we adopt the latest design methodology of dynamic partial reconfiguration of FPGA based on EAPR which is proposed by Xilinx and use IP core to build system on chip.This paper also provides a way of design a dynamically reconfigurable system based on PPC405 and FPGA hardware platform to configure and reconfigure FPGA selected a CompactFlash configuration mode.The PowerPC405,the hardware core microprocessor in XC2VP30,is used to manage the ICAP to implement the dynamic partial reconfiguration process.This design realizes the time-share of hardware resource,reduces the time of reconfiguration,greatly improves the utilization of FPGA,and verifies function on the FPGA of Virtex ⅡPro.