A Single Float-point Singular Value Decomposition Processor Based on FPGA
Dou Heng · Microelectronics & Computer · 2009
A new architecture of single float-point SVD processor is proposed to improve the real-time processing ability in digital signal processing application and compute a large SVD,which is based on the implementation of two-sided Jacobi algorithm on FPGA. This architecture sufficiently considers area-consuming,performance and accuracy,and uses CORDIC unit based on GA algorithm to improve the accuracy and performance of the key module. Moreover,the application of two-plane rotation and FPGA's DSP units farther improves the hardware's performance,and avoids revising the result by scale factor. The experiment demonstrates the proposed architecture is efficient.