Research and improvement on architecture-aware analytic mapping model for networks-on-chip
Xie Tong-fei · Jisuanji yingyong yanjiu · 2011
In order to solve mapping problems of network-on-chip(NoC) irregular mesh caused by the chip's faulty links and other reasons,proposed an IA3MAP(improved architecture-aware analytic mapping) model.By introducing the shortest path routing hops,improved the total distortion accuracy,and ensured the solutions' feasibility by the special data processing of inaccessible modules.The results show that the power optimization ratio of IA3MAP model is up to 10%~20%.It is more effective to solve large-scale communication-intensive NoC task mapping problem.