A VerilogHDLCompilerfor RTL Combinational Circuits
Chen Ji · Journal of Hunan University · 2001
A Verilog HDL compiler for ISCAS85/89 Benchmarks as a utility for the study of RTL combinational circuits is introduced.On the basis of the analysis of features of Verilog HDL and RTL description,methods of the construction of the module library and the conversion from RTL HDL description to gate level description are showed.